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EL5211A
Data Sheet April 24, 2007 FN6143.1
60MHz Rail-to-Rail Input-Output Op Amp
The EL5211A is a low power, high voltage, rail-to-rail inputoutput amplifier containing two amplifiers. Operating on supplies ranging from 5V to 15V, while consuming only 2.5mA per amplifier, the EL5211A has a bandwidth of 60MHz (-3dB) and provides common-mode input ability beyond the supply rails, as well as rail-to-rail output capability. This enables the EL5211A to offer maximum dynamic range at any supply voltage. The EL5211A also features fast slewing and settling times, as well as a high output drive capability of 65mA (sink and source). These features make the EL5211A ideal for high speed filtering and signal conditioning application. Other applications include battery-powered, portable devices and anywhere low power consumption is important. The EL5211A is available in the 8 Ld HMSOP package, features a standard operational amplifier pinout, and is specified for operation over a temperature range of -40C to +85C.
Features
* 60MHz (-3dB) bandwidth * Supply voltage = 4.5V to 16.5V * Low supply current (per amplifier) = 2.5mA * High slew rate = 75V/s * Unity-gain stable * Beyond the rails input capability * Rail-to-rail output swing * 110mA output short current * Pb-free plus anneal available (RoHS compliant)
Applications
* TFT-LCD panels * VCOM amplifiers * Drivers for A/D converters * Data acquisition
Ordering Information
PART NUMBER (Note) EL5211AIYEZ EL5211AIYEZ-T7 PART TAPE & MARKING REEL BBLAA BBLAA 7" 13" PACKAGE (Pb-free) PKG. DWG. #
* Video processing * Audio processing * Active filters * Test equipment * Battery-powered applications * Portable equipment
8 Ld HMSOP MDP0050 (3.0mm) 8 Ld HMSOP MDP0050 (3.0mm) 8 Ld HMSOP MDP0050 (3.0mm)
EL5211AIYEZ-T13 BBLAA
Pinout
EL5211A (8 LD HMSOP) TOP VIEW
VOUTA 1 VINA- 2 VINA+ 3 VS- 4 + + 8 VS+ 7 VOUTB 6 VINB5 VINB+
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2005, 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5211A
Absolute Maximum Ratings (TA = +25C)
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . .+18V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . VS- - 0.5V, VS +0.5V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 65mA Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125C
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR CMRR AVOL
VS+ = +5V, VS- = -5V, RL = 1k to 0V, TA = +25C, Unless Otherwise Specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
Input Offset Voltage Average Offset Voltage Drift (Note 1) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range Common-Mode Rejection Ratio Open-Loop Gain
VCM = 0V
3 7
15
mV V/C
VCM = 0V
2 1 2 -5.5
60
nA G pF
+5.5 70 70
V dB dB
for VIN from -5.5V to 5.5V -4.5V VOUT 4.5V
50 60
OUTPUT CHARACTERISTICS VOL VOH ISC IOUT Output Swing Low Output Swing High Short-Circuit Current Output Current IL = -5mA IL = 5mA 4.8 -4.9 4.9 125 65 -4.8 V V mA mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 2.25V to 7.75V No load 60 80 5 7.5 dB mA
DYNAMIC PERFORMANCE SR tS BW GBWP PM CS dG dP NOTES: 1. Measured over operating temperature range. 2. Slew rate is measured on rising and falling edges. 3. NTSC signal generator used. Slew Rate (Note 2) Settling to +0.1% (AV = +1) -3dB Bandwidth Gain-Bandwidth Product Phase Margin Channel Separation Differential Gain (Note 3) Differential Phase (Note 3) f = 5MHz RF = RG = 1k and VOUT = 1.4V RF = RG = 1k and VOUT = 1.4V -4.0V VOUT 4.0V, 20% to 80% (AV = +1), VO = 2V step 75 80 60 32 50 110 0.17 0.24 V/s ns MHz MHz dB %
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FN6143.1 April 24, 2007
EL5211A
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR CMRR AVOL Input Offset Voltage Average Offset Voltage Drift (Note 4) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range Common-Mode Rejection Ratio Open-Loop Gain for VIN from -0.5V to 5.5V 0.5V VOUT 4.5V -0.5 45 60 66 70 VCM = 2.5V VCM = 2.5V 3 7 2 1 2 +5.5 60 15 mV V/C nA G pF V dB dB VS+ = +5V, VS- = 0V, RL = 1k to 2.5V, TA = +25C, Unless Otherwise Specified. CONDITION MIN TYP MAX UNIT
DESCRIPTION
OUTPUT CHARACTERISTICS VOL VOH ISC IOUT Output Swing Low Output Swing High Short-Circuit Current Output Current IL = -5mA IL = 5mA 4.8 100 4.9 125 65 200 mV V mA mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load 60 80 5 7.5 dB mA
DYNAMIC PERFORMANCE SR tS BW GBWP PM CS dG dP NOTES: 4. Measured over operating temperature range. 5. Slew rate is measured on rising and falling edges. 6. NTSC signal generator used. Slew Rate (Note 5) Settling to +0.1% (AV = +1) -3dB Bandwidth Gain-Bandwidth Product Phase Margin Channel Separation Differential Gain (Note 6) Differential Phase (Note 6) f = 5MHz RF = RG = 1k and VOUT = 1.4V RF = RG = 1k and VOUT = 1.4V 1V VOUT 4V, 20% to 80% (AV = +1), VO = 2V step 75 80 60 32 50 110 0.17 0.24 V/s ns MHz MHz dB %
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS VOS TCVOS IB RIN CIN CMIR
VS+ = +15V, VS- = 0V, RL = 1k to 7.5V, TA = +25C, Unless Otherwise Specified. CONDITION MIN TYP MAX UNIT
DESCRIPTION
Input Offset Voltage Average Offset Voltage Drift (Note 7) Input Bias Current Input Impedance Input Capacitance Common-Mode Input Range
VCM = 7.5V
3 7
15
mV V/C
VCM = 7.5V
2 1 2 -0.5
60
nA G pF
+15.5
V
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FN6143.1 April 24, 2007
EL5211A
Electrical Specifications
PARAMETER CMRR AVOL VS+ = +15V, VS- = 0V, RL = 1k to 7.5V, TA = +25C, Unless Otherwise Specified. (Continued) CONDITION for VIN from -0.5V to 15.5V 0.5V VOUT 14.5V MIN 53 60 TYP 72 70 MAX UNIT dB dB
DESCRIPTION Common-Mode Rejection Ratio Open-Loop Gain
OUTPUT CHARACTERISTICS VOL VOH ISC IOUT Output Swing Low Output Swing High Short-Circuit Current Output Current IL = -5mA IL = 5mA 14.8 100 14.9 125 65 200 mV V mA mA
POWER SUPPLY PERFORMANCE PSRR IS Power Supply Rejection Ratio Supply Current VS is moved from 4.5V to 15.5V No load 60 80 5 7.5 dB mA
DYNAMIC PERFORMANCE SR tS BW GBWP PM CS dG dP NOTES: 7. Measured over operating temperature range. 8. Slew rate is measured on rising and falling edges. 9. NTSC signal generator used. Slew Rate (Note 8) Settling to +0.1% (AV = +1) -3dB Bandwidth Gain-Bandwidth Product Phase Margin Channel Separation Differential Gain (Note 9) Differential Phase (Note 9) f = 5MHz RF = RG = 1k and VOUT = 1.4V RF = RG = 1k and VOUT = 1.4V 1V VOUT 14V, 20% to 80% (AV = +1), VO = 2V step 75 80 60 32 50 110 0.16 0.22 V/s ns MHz MHz dB %
Typical Performance Curves
500 QUANTITY (AMPLIFIERS) QUANTITY (AMPLIFIERS) VS = 5V TA = +25C 400 300 200 100 0 -8 -6 -4 -2 -0 2 4 6 -12 -10 8 10 12 TYPICAL PRODUCTION DISTRIBUTION 25 VS = 5V 20 15 10 5 0 1 3 5 7 9 13 15 17 19 21
FN6143.1 April 24, 2007
TYPICAL PRODUCTION DISTRIBUTION
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE DRIFT, TCVOS (V/C)
FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION
FIGURE 2. INPUT OFFSET VOLTAGE DRIFT
4
11
EL5211A Typical Performance Curves (Continued)
2.0 INPUT OFFSET VOLTAGE (mV) 1.5 1.0 0.5 0 -0.5 -50 INPUT BIAS CURRENT (A) 0.008 0.004 0 -0.004 -0.008 -0.012 -50 VS = 5V
-10
30
70
110
150
-10
30
70
110
150
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
4.96 OUTPUT HIGH VOLTAGE (V)
OUTPUT LOW VOLTAGE (V)
VS = 5V IOUT = 5mA
-4.85 -4.87 -4.89 -4.91 -4.93
VS = 5V IOUT = 5mA
4.94 4.92 4.90 4.88
4.86 -50
-10
30
70
110
150
-4.95 -50
-10
30
70
110
150
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
75 OPEN-LOOP GAIN (dB) VS = 5V RL = 1k 70 SLEW RATE (V/s)
78 77 76 75 74 73
VS = 5V
65
60 -50
-10
30
70
110
150
72 -50
-10
30
70
110
150
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE
FIGURE 8. SLEW RATE vs TEMPERATURE
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EL5211A Typical Performance Curves (Continued)
2.9 SUPPLY CURRENT (mA) 2.7 2.5 2.3 2.1 1.9 1.7 1.5 4 8 12 16 20 TA = +25C SUPPLY CURRENT (mA) 2.70 2.65 2.60 2.55 2.50 2.45 2.40 -50 VS = 5V
-10
30
70
110
150
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE
FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs TEMPERATURE
0 DIFFERENTIAL PHASE () -0.02 DIFFERENTIAL GAIN (%) -0.04 -0.06 -0.08 -0.10 -0.12 -0.14 V = 5V S -0.16 AV = 2 RL = 1k -0.18 0
0.30 0.25 0.20 0.15 0.10 0.05 0 100 IRE 200 0 100 IRE 200
FIGURE 11. DIFFERENTIAL GAIN
FIGURE 12. DIFFERENTIAL PHASE
-30 -40 DISTORTION (dB) -50 -60
VS = 5V AV = 2 RL = 1k FREQ = 1MHz GAIN (dB)
80 60 GAIN 40 20 0 -20 1k PHASE
250 190 130 70 10 -50 100M PHASE ()
2nd HD -70 -80 -90 0 2 4 6 8 10 3rd HD
10k
100k
1M
10M
VOP-P (V)
FREQUENCY (Hz)
FIGURE 13. HARMONIC DISTORTION vs VOP-P
FIGURE 14. OPEN LOOP GAIN AND PHASE
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EL5211A Typical Performance Curves (Continued)
MAGNITUDE (NORMALIZED) (dB) VS = 5V AV = 1 CLOAD = 0pF MAGNITUDE (NORMALIZED) (dB) 5 3 1 -1 -3 -5 100k 25 100pF 15 5 -5 -15 VS = 5V AV = 1 RL = 1k 1M 10M 100M 1000pF 47pF 10pF
1k
560 150
1M
10M
100M
-25 100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS RL
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS CL
OUTPUT IMPEDANCE ()
350 300 250 200 150 100 50 0 10k 100k 1M FREQUENCY (Hz) 10M 100M
MAXIMUM OUTPUT SWING (VP-P)
400
12 10 8 6 4 VS = 5V 2 AV = 1 RL = 1k DISTORTION <1% 0 10k 100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE
FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY
-15 -25 CMRR (dB) -35 -45 -55 -65 1k PSRR (dB)
-80 PSRR+ -60 PSRR-
-40
-20 VS = 5V TA = +25C 10k 100k 1M 10M 100M 0 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. CMRR
FIGURE 20. PSRR
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FN6143.1 April 24, 2007
EL5211A Typical Performance Curves (Continued)
1k VOLTAGE NOISE (nV/Hz) -60 DUAL MEASURED CH A TO B QUAD MEASURED CH A TO D OR B TO C -80 OTHER COMBINATIONS YIELD IMPROVED REJECTION XTALK (dB) -100
100
-120 VS = 5V RL = 1k AV = 1 VIN = 110mVRMS 10k 100k 1M 10M 30M
10
-140
1 100
1k
10k
100k
1M
10M
100M
-160 1k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY
FIGURE 22. CHANNEL SEPARATION
100
80 OVERSHOOT (%)
STEP SIZE (V)
VS = 5V AV = 1 RL = 1k VIN = 50mV TA = +25C
5 4 3 2 1 0 -1 -2 -3 -4 -5 55
VS = 5V AV = 1 RL = 1k
0.1%
60
40
20
0.1%
0 10
100 LOAD CAPACITANCE (pF)
1k
65
75
85
95
105
SETTLING TIME (ns)
FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
FIGURE 24. SETTLING TIME vs STEP SIZE
VS = 5V TA = +25C AV = 1 RL = 1k
VS = 5V TA = +25C AV = 1 RL = 1k
100mV STEP
1V STEP 50ns/DIV 50ns/DIV
FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE
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FN6143.1 April 24, 2007
EL5211A Pin Descriptions
PIN NUMBER 1 PIN NAME VOUTA Amplifier A output FUNCTION EQUIVALENT CIRCUIT
VS+
GND
VS-
CIRCUIT 1 2 VINAAmplifier A inverting input
VS+
VS-
CIRCUIT 2 3 4 5 6 7 8 VINA+ VSVINB+ VINBVOUTB VS+ Amplifier A non-inverting input Negative power supply Amplifier B non-inverting input Amplifier B inverting input Amplifier B output Positive power supply (Reference Circuit 2) (Reference Circuit 2) (Reference Circuit 1) (Reference Circuit 2)
Applications Information
Product Description
The EL5211A voltage feedback amplifier is fabricated using a high voltage CMOS process. It exhibits rail-to-rail input and output capability, is unity gain stable, and has low power consumption (2.5mA per amplifier). These features make the EL5211A ideal for a wide range of general-purpose applications. Connected in voltage follower mode and driving a load of 1k, the EL5211A has a -3dB bandwidth of 60MHz while maintaining a 75V/s slew rate. The EL5211A is a dual amplifier.
range even closer to the supply rails. Figure 27 shows the input and output waveforms for the device in the unity-gain configuration. Operation is from 5V supply with a 1k load connected to GND. The input is a 10VP-P sinusoid. The output voltage is approximately 9.8VP-P.
5V 10s
The EL5211A is specified with a single nominal supply voltage from 5V to 15V or a split supply with its total range from 5V to 15V. Correct operation is guaranteed for a supply range of 4.5V to 16.5V. Most EL5211A specifications are stable over both the full supply range and operating temperatures of -40C to +85C. Parameter variations with operating voltage and/or temperature are shown in the "Typical Performance Curves" on page 4. The input common-mode voltage range of the EL5211A extends 500mV beyond the supply rails. The output swings of the EL5211A typically extend to within 100mV of positive and negative supply rails with load currents of 5mA. Decreasing load currents will extend the output voltage
5V
FIGURE 27. OPERATION WITH RAIL-TO-RAIL INPUT AND OUTPUT
Short Circuit Current Limit
The EL5211A will limit the short circuit current to 110mA if the output is directly shorted to the positive or the negative supply. If an output is shorted indefinitely, the power dissipation could easily increase such that the device may be damaged. Maximum reliability is maintained if the output continuous current never exceeds 65mA. This limit is set by the design of the internal metal interconnects.
FN6143.1 April 24, 2007
9
OUTPUT
Operating Voltage, Input, and Output
VS = 5V TA = +25C AV = 1 VIN = 10VP-
INPUT
EL5211A
Output Phase Reversal
The EL5211A is immune to phase reversal as long as the input voltage is limited from VS- -0.5V to VS+ +0.5V. Figure 28 shows a photo of the output of the device with the input voltage driven beyond the supply rails. Although the device's output will not change phase, the input's overvoltage should be avoided. If an input voltage exceeds supply voltage by more than 0.6V, electrostatic protection diodes placed in the input stage of the device begin to conduct and overvoltage damage could occur.
1V 10s
when sinking, where: * i = 1 to 2 for dual and 1 to 4 for quad * VS = Total supply voltage * ISMAX = Maximum supply current per amplifier * VOUTi = Maximum output voltage of the application * ILOADi = Load current If we set the two PDMAX equations equal to each other, we can solve for RLOADi to avoid device overheat. Figures 29 and 30 provide a convenient way to see if the device will overheat. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature. By using the Equation 3, it is a simple matter to see if PDMAX exceeds the device's power derating curves. To ensure proper operation, it is important to observe the recommended derating curves shown in Figures 29 and 30.
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.6 POWER DISSIPATION (W) 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (C) 486mW
HM =
1V
VS = 2.5V TA = +25C AV = 1 VIN = 6VP-P
FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5211A amplifier, it is possible to exceed the +125C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX P DMAX = ------------------------------------------- JA
JA
SO 2 0 P8 6 C/ W
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
(EQ. 1)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 POWER DISSIPATION (W) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125
JA
where: * TJMAX = Maximum junction temperature * TAMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation in the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or:
P DMAX = i [ V S x I SMAX + ( V S + - V OUT i ) x I LOAD i ] (EQ. 2)
870mW
HM =
SO 11 P8 5 C/ W
AMBIENT TEMPERATURE (C)
when sourcing, and:
P DMAX = i [ V S x I SMAX + ( V OUT i - V S - ) x I LOAD i ] (EQ. 3)
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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FN6143.1 April 24, 2007
EL5211A
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and a quad package be configured as a unity gain follower. The inverting input should be directly connected to the output and the non-inverting input tied to the ground plane.
Power Supply Bypassing and Printed Circuit Board Layout
The EL5211A can provide gain at high frequency. As with any high-frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1F ceramic capacitor should be placed from VS+ to pin to VS- pin. A 4.7F tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7F capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used.
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FN6143.1 April 24, 2007
EL5211A HMSOP (Heat-Sink MSOP) Package Family
E B 1 E1 N D (N/2)+1 0.25 M C A B
MDP0050
HMSOP (HEAT-SINK MSOP) PACKAGE FAMILY MILLIMETERS SYMBOL A A1 A2 HMSOP8 HMSOP10 1.00 0.075 0.86 0.30 0.15 3.00 1.85 4.90 3.00 1.73 0.65 0.55 0.95 8 1.00 0.075 0.86 0.20 0.15 3.00 1.85 4.90 3.00 1.73 0.50 0.55 0.95 10 TOLERANCE Max. +0.025/-0.050 0.09 +0.07/-0.08 0.05 0.10 Reference 0.15 0.10 Reference Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. 1 2/07
(N/2)
PIN #1 I.D. TOP VIEW
A
b c D D1
EXPOSED THERMAL PAD
E2
E E1 E2
D1
e L L1
BOTTOM VIEW
N NOTES:
e C SEATING PLANE 0.10 C N LEADS b SIDE VIEW
H
1. Plastic or metal protrusions of 0.15mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included.
0.08 M C A B
3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
L1 A c END VIEW SEE DETAIL "X"
A2 GAUGE 0.25 PLANE L 3 3 DETAIL X A1
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12
FN6143.1 April 24, 2007

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